Memories, such as dynamic random access memories (DRAMs), synchronous dynamic random access memories (SDRAMs), double data rate synchronous dynamic random access memories (DDR SDRAMs), double data rate two synchronous dynamic random access memories (DDR2 SDRAMs), pseudo-static random access memories (PSRAMs), cellular random access memories (CellularRAMs), and mobile random access memories (Mobile-RAMs) include receivers for receiving address signals, command signals, and bank select signals for reading data from and writing data to the memories. Typically, the address signals, command signals, and bank select signals are provided to the inputs of the corresponding receivers of the memory for a time longer than necessary for the receivers to collect and decode the signals. The receivers only need the input signals to be present for a minimum setup and hold time.
The setup and hold times are typically referenced with respect to a rising edge of an external differential clock signal. The setup time is the time the input signal needs to be provided to the receiver before the rising edge of the external clock signal, and the hold time is the time the input signal needs to be provided to the receiver after the rising edge of the external clock signal. If the input signal is not provided to the receiver during the setup and hold time, then the receiver may not properly collect and decode the input signal for use in accessing the memory.
Typically, receivers are activated and ready to receive an input signal at all times. Therefore, the receivers require a constant current source, which continues to consume power even when the receiver is not being used. For low power and/or battery powered applications, such as cellular phones and other portable electronic devices, memories that conserve power are desired.